Nanoelectronics & Quantum Devices

Electronics where quantum mechanics rules. Learn Moore's law and scaling, short-channel effects, FinFETs and gate-all-around nanosheets, gate-oxide tunnelling and high-k dielectrics, ballistic transport and the conductance quantum, single-electron transistors and Coulomb blockade, resonant tunnelling, spintronics and MRAM, 2D-material and CNT transistors, memristors and neuromorphic devices, and qubits — with Python for tunnelling probability through thin oxides and charging energies of quantum dots.

Modern transistors have gates only a few nanometres long and oxides a few atoms thick. At this scale electrons tunnel through barriers, travel without scattering and are affected by single charges — effects that both limit conventional devices and enable new ones.

Nanoelectronics engineers invent device architectures (FinFETs, nanosheets) and materials (high-k, 2D semiconductors) to keep scaling, and explore beyond-CMOS devices for memory, AI hardware and quantum computing.

An analogy

Shrinking a transistor is like making a water tap smaller and smaller: eventually the washer is so thin that water seeps through even when it's closed (tunnelling leakage), so engineers redesign the tap to wrap around the pipe from all sides (gate-all-around).

Scaling and its limits

Moore's law — transistor counts doubling ~every 2 years — came from shrinking dimensions. Classic (Dennard) scaling kept power density constant until ~2005; then leakage and voltage limits stopped frequency growth. Problems at small sizes: short-channel effects (DIBL, threshold roll-off), gate tunnelling, variability from random dopants, interconnect resistance and heat.

Modern transistor architectures

How the industry kept scaling:

Quantum transport

In channels shorter than the mean free path, electrons travel ballistically; conductance becomes quantised in units of 2e²/h per channel (Landauer). Tunnelling enables resonant tunnelling diodes, tunnel FETs (SS < 60 mV/dec) and flash memory (Fowler–Nordheim programming). Single-electron transistors switch with one electron when charging energy exceeds kT — ultra-sensitive electrometers and qubit readout.

Beyond CMOS

2D semiconductors (MoS₂, WSe₂) and CNTs for ultra-thin channels; spintronics (MTJs in MRAM, spin–orbit torque); phase-change and resistive RAM (memristors) for in-memory and neuromorphic computing; ferroelectric FETs; photonic interconnects; and quantum devices — superconducting qubits, semiconductor spin qubits, topological approaches — that exploit coherence rather than fight it.

Formulas

Worked example: EOT

Given: HfO₂ (k = 20), 4 nm physical

Find: EOT.

Answer: 0.78 nm

Worked example: Conductance quantum

Given: G₀ = 2e²/h

Find: Resistance of one channel.

Answer: 12.9 kΩ

Worked example: Tunnelling ratio

Given: Oxide 2.0 vs 1.5 nm

Find: Increase.

Answer: ~300× more leakage

Oxide tunnelling and Coulomb blockade

import math
# Quantum tunnelling through a thin oxide and Coulomb blockade in a single-electron transistor
hbar, me, e = 1.055e-34, 9.109e-31, 1.602e-19
phi = 3.1 * e                             # Si/SiO2 barrier height
m_ox = 0.4 * me
kappa = math.sqrt(2 * m_ox * phi) / hbar
for t_nm in (3.0, 2.0, 1.5, 1.0):
    T = math.exp(-2 * kappa * t_nm * 1e-9)
    print(f"oxide {t_nm:.1f} nm: tunnelling probability ~ {T:.1e}")
# Coulomb blockade: charging energy of a quantum dot vs thermal energy
eps0 = 8.854e-12
for d_nm in (100, 20, 5):
    C = 2 * math.pi * eps0 * 3.9 * d_nm * 1e-9     # isolated sphere in SiO2 (C = 4 pi eps r)
    Ec = e**2 / (2 * C) / e * 1000
    print(f"dot {d_nm:3d} nm: C = {C*1e18:.2f} aF, charging energy {Ec:.1f} meV (kT at 300 K = 25.9 meV)")
# oxide 3.0 nm: tunnelling probability ~ 1.4e-15
# oxide 2.0 nm: tunnelling probability ~ 1.2e-10
# oxide 1.5 nm: tunnelling probability ~ 3.7e-08
# oxide 1.0 nm: tunnelling probability ~ 1.1e-05
# dot 100 nm: C = 21.70 aF, charging energy 3.7 meV (kT at 300 K = 25.9 meV)
# dot  20 nm: C = 4.34 aF, charging energy 18.5 meV (kT at 300 K = 25.9 meV)
# dot   5 nm: C = 1.08 aF, charging energy 73.8 meV (kT at 300 K = 25.9 meV)

Each nanometre thinner increases tunnelling ~10⁵×: at 1 nm SiO₂, gate leakage becomes intolerable — which forced the switch to high-k dielectrics (HfO₂) that are physically thicker for the same capacitance. Single-electron effects need charging energies well above kT: a 5 nm dot (74 meV ≈ 3kT) shows blockade near room temperature only marginally; practical SETs use smaller dots or cryogenic temperatures.

Common mistakes

Applications

Key takeaways

Going further