11.4 EEPROM: Electrically Erasable Programmable ROM

Explain how EEPROM's electrical, byte-addressable erase/write mechanism improves on EPROM, and why it remains a nonvolatile technology despite being rewritable in-circuit.

EEPROM (Electrically Erasable Programmable Read-Only Memory) is nonvolatile memory that can be both erased and rewritten using electrical signals alone — no UV lamp, no removing the chip from the circuit board. Like EPROM, its storage cells are built from floating-gate transistors that hold data as trapped charge, but EEPROM adds the circuitry needed to tunnel electrons onto or off of the floating gate electrically (via Fowler-Nordheim tunneling), and critically, it can usually do this at the granularity of a single byte or word rather than requiring a whole-chip erase. This single improvement — selective, in-circuit, electrical erase/write — is what makes EEPROM practical for storing data that changes occasionally during a product's lifetime: calibration constants, configuration settings, small logs, and other data that must survive power loss but also needs to be updated in the field without special programming equipment.

Core concept: electrical erase replaces UV light

EEPROM cells still use a floating-gate transistor, exactly like EPROM, so the physics of nonvolatile storage — trapped charge with no leakage path through the surrounding oxide — is the same. What EEPROM changes is how that charge is added or removed: rather than relying on external UV photons to knock electrons off the floating gate, EEPROM includes on-chip circuitry that applies a controlled electric field across a thin tunnel oxide, letting electrons quantum-mechanically tunnel through the barrier in either direction under electrical control. This is a fully electrical, reversible, in-circuit operation.

The other major practical improvement is addressability of the erase operation itself. Where EPROM's erase mechanism (UV light through a window) has no way to target one memory cell, EEPROM's electrical mechanism naturally works through the same address decoder used for reads and writes — so an EEPROM can typically erase and rewrite an individual byte or word without disturbing any other stored data.

• Nonvolatile: retains data with power removed, same trapped-charge principle as EPROM • Electrically erasable: no UV light, no chip removal — erase happens in-circuit • Typically byte/word-addressable for erase and write, unlike EPROM's whole-chip UV erase • Still uses a floating-gate cell internally, just with electrical tunneling instead of light-driven charge release

Step-by-step: an in-circuit byte rewrite

Step 1: the controlling circuit (a microcontroller, for example) presents the target address on the EEPROM's address bus, exactly as for a normal read. Step 2: instead of a read strobe, a write/erase control sequence is asserted, which internally applies the elevated tunneling voltage to just the floating gate(s) at that address, removing or adding trapped charge as needed to represent the new data value. Step 3: the EEPROM's internal control logic manages timing automatically — write/erase cycles take noticeably longer than a simple read (often milliseconds rather than nanoseconds), so many EEPROM devices provide a busy/ready status signal the host must poll or wait on. Step 4: once the operation completes, the newly written byte reads back exactly like any other ROM location — a normal address-in/data-out read cycle — while every other address in the device remains completely undisturbed.

Endurance, use cases, and where EEPROM sits versus Flash

Because each electrical erase/write cycle stresses the thin tunnel oxide slightly, EEPROM cells have a finite write endurance — typically specified as on the order of 100,000 to 1,000,000 erase/write cycles per byte — after which a given cell may become unreliable. This is why EEPROM is best suited to data that changes occasionally (settings, calibration values, small counters) rather than data rewritten continuously at high speed, and why designers wear-level or minimize unnecessary writes in EEPROM-based designs.

EEPROM's fine-grained, byte-level erase is also its main practical difference from Flash memory (the next topic): Flash sacrifices some of that fine granularity — erasing in larger blocks or sectors — in exchange for a denser array and lower per-bit cost, which is why Flash dominates for bulk nonvolatile storage while EEPROM remains the go-to choice for small amounts of frequently-but-not-constantly updated configuration data.

EEPROM operation notation

Read cycle:   Address → decoder → sensed floating-gate state → Data out   (fast, ~ns-µs)
Write cycle:  Address + Data → tunneling voltage applied at that cell    (slow, ~ms)
Erase cycle:  Byte/word-level electrical erase, in-circuit, no UV needed

Endurance rating (typical): ~10^5 to 10^6 erase/write cycles per byte

Code Examples

Only the single targeted byte's floating gates are electrically altered; the rest of the array is untouched, which is exactly the fine-grained rewrite EPROM's UV, whole-chip erase could never provide.

One byte is rewritten in-circuit in milliseconds — no chip removal, no whole-device erase.

System stores a sensor calibration offset at EEPROM address 0x0A.

Old value at 0x0A:  0x37

Recalibration procedure (in-circuit, no chip removal):
  1. Host asserts write sequence with address = 0x0A, data = 0x42
  2. EEPROM internally tunnels charge at that byte's floating gates
  3. EEPROM asserts "busy" for the write duration (~5 ms typical)
  4. Host polls until "ready", then reads address 0x0A back
  5. Readback confirms 0x42 — all other addresses (e.g. 0x0B) unchanged

Important Rules

EEPROM erase and write are electrical and can typically be done in-circuit, without removing the chip.

EEPROM supports byte/word-level erase, unlike EPROM's mandatory whole-chip UV erase.

Data remains nonvolatile — trapped floating-gate charge persists without power.

EEPROM cells have finite write endurance (a bounded number of erase/write cycles per byte).

Practical use

EEPROM is the standard place to store settings that must survive power loss but change only occasionally: Wi-Fi credentials, device serial numbers, sensor calibration tables, and small configuration structures in embedded systems (a common example being the small on-chip EEPROM built into many microcontrollers, addressed separately from program Flash).

Using EEPROM as if it had unlimited write endurance, rewriting the same byte constantly (e.g. every control loop iteration).

Reserve EEPROM writes for data that changes occasionally, and use RAM (or wear-leveling techniques) for anything updated at high frequency.

Each electrical erase/write cycle physically stresses the tunnel oxide; exceeding the rated endurance (often ~10^5–10^6 cycles) risks that byte becoming unreliable or unwritable.

[conceptual] What is the key practical advantage of EEPROM over EPROM? A. EEPROM cells are volatile, so they reset automatically B. EEPROM can be erased and rewritten electrically and selectively (byte/word level), in-circuit, without UV light or chip removal C. EEPROM has unlimited write endurance D. EEPROM does not require an address decoder

B. EEPROM can be erased and rewritten electrically and selectively (byte/word level), in-circuit, without UV light or chip removal — EEPROM keeps the same floating-gate nonvolatile storage as EPROM but replaces UV-light whole-chip erasure with electrical, addressable erase/write — enabling in-circuit, byte-level updates. It does not have unlimited endurance; that remains a finite, rated number of cycles.

[tricky] Why does EEPROM still count as 'nonvolatile' memory even though it can be rewritten electrically at any time? A. Because it requires a battery to hold data B. Because trapped floating-gate charge persists without any applied power — rewritability and volatility are independent properties C. Because EEPROM data is stored in flip-flops, which are inherently nonvolatile D. Because EEPROM's data is backed up externally

B. Because trapped floating-gate charge persists without any applied power — rewritability and volatility are independent properties — Volatility describes whether data survives with power removed, not whether it can be changed. EEPROM's floating-gate cells hold charge with no leakage path and thus no power requirement to retain data — the same nonvolatility mechanism as EPROM/ROM — while separately also supporting electrical rewriting, which EPROM/ROM do not support in-circuit.

A microcontroller writes a status counter to the same EEPROM byte once every second, and the EEPROM is rated for 100,000 erase/write cycles per byte. Estimate how long the design can run before that byte's endurance limit is reached, and propose one design change to extend the device's field life.

At 1 write/second, 100,000 cycles are reached in 100,000 seconds ≈ 27.8 hours — clearly too short for a long-lived product. A standard fix is wear-leveling: rotate the counter across a range of EEPROM addresses (or move it to RAM and only periodically flush to EEPROM), spreading the write load across many bytes so no single cell is rewritten every second.

Convert cycles to time using 1 write per second, then think about whether the same physical byte must be reused every time.