Data Acquisition Systems

From analog signals to trustworthy digital data. Learn DAQ architecture (multiplexer, PGA, sample-and-hold, ADC), resolution, LSB, quantisation noise, SNR and ENOB, sampling theorem, aliasing and anti-alias filters, multiplexed vs simultaneous sampling, single-ended vs differential inputs, triggering, buffering, timestamps, and data-logging practice — with Python for resolution, ENOB and aliasing.

A data acquisition (DAQ) system measures many channels, converts them to numbers and stores or transmits them: test benches, vibration analysers, lab experiments, SCADA RTUs and PLC analog cards are all DAQ systems.

Choosing the right resolution, sample rate and input configuration determines whether the recorded data can be trusted. Aliasing in particular silently produces signals that do not exist.

An analogy

Sampling a signal is like filming a spinning wheel: film too slowly and the wheel appears to turn backwards (aliasing). The camera's frame rate must be more than twice the fastest motion you want to see.

DAQ architecture

Signals enter through terminals and signal conditioning, then a multiplexer selects one channel at a time, a programmable-gain amplifier (PGA) scales it, a sample-and-hold freezes it, and the ADC converts it. A timing engine controls sample rate and triggers; a FIFO buffer and bus (USB, Ethernet, PCIe) move the data to a computer or controller.

Resolution vs accuracy

Resolution is the smallest step (LSB); accuracy includes offset, gain error, non-linearity (INL/DNL), noise and drift. Datasheets give accuracy as ±(% of reading + % of range). Match input range to the signal: a 0.1 V signal on a ±10 V range wastes 99% of the codes — use the PGA.

Sampling and aliasing

Frequencies above f_s/2 fold back into the band 0…f_s/2 and cannot be separated afterwards. An analog anti-aliasing low-pass filter must attenuate them before the ADC. Delta-sigma ADCs oversample and include steep digital filters, making them ideal for vibration and audio; SAR ADCs are fast and suit multiplexed control inputs.

Input configurations and system design

Wiring and timing choices:

Formulas

Worked example: Temperature resolution

Given: 16-bit ADC, 0–10 V = 0–500 °C

Find: °C per LSB.

Answer: 0.0076 °C per count

Worked example: Sample rate for vibration

Given: Bearing frequencies up to 5 kHz

Find: Minimum sample rate and filter.

Answer: ≥ 12.8 kS/s with an anti-alias filter at ~5 kHz

Worked example: ENOB

Given: SINAD 84 dB

Find: ENOB.

Answer: 13.66 bits

Resolution, ENOB and aliasing

import math
# ADC resolution, quantisation noise and ENOB
Vref = 10.0
for bits in (12, 16, 24):
    lsb = Vref / 2**bits
    print(f"{bits}-bit: LSB = {lsb*1e6:10.3f} uV, ideal SNR = {6.02*bits+1.76:.1f} dB")
sinad = 84.0
print(f"measured SINAD {sinad} dB -> ENOB = {(sinad-1.76)/6.02:.2f} bits")
# Aliasing: 60 Hz sampled at 50 S/s appears at |60 - 50| Hz
fs, f = 50, 60
alias = abs(f - round(f / fs) * fs)
print(f"{f} Hz sampled at {fs} S/s aliases to {alias} Hz")
# 12-bit: LSB =   2441.406 uV, ideal SNR = 74.0 dB
# 16-bit: LSB =    152.588 uV, ideal SNR = 98.1 dB
# 24-bit: LSB =      0.596 uV, ideal SNR = 146.2 dB
# measured SINAD 84.0 dB -> ENOB = 13.66 bits
# 60 Hz sampled at 50 S/s aliases to 10 Hz

A '16-bit' card with 84 dB SINAD really behaves like a 13.7-bit converter. A 24-bit converter's 0.6 µV LSB is far below real noise — its benefit is dynamic range, not accuracy. Mains hum sampled too slowly turns into a fake 10 Hz oscillation.

Common mistakes

Applications

Key takeaways

Going further