Datasheets, Device Selection & Device Debugging

Choosing and troubleshooting real devices. Learn to read semiconductor datasheets (absolute maximum ratings, electrical characteristics and test conditions, typical curves, temperature range, package and thermal data, SOA, switching and capacitance curves, gate charge, reverse recovery, leakage, breakdown, reliability/qualification data) — never treating typical values as guaranteed; a systematic selection flow (voltage, current, power, frequency, switching speed, leakage, capacitance, temperature, package/thermal, SOA, cost, availability, reliability, qualification/automotive grade); and device-level debugging (shorts, opens, leakage, low gain, wrong threshold, breakdown, thermal runaway, switching loss, oscillation, unexpected capacitance, gate failure, ESD damage) with a structured workflow — with Python comparing three MOSFET candidates by loss, junction temperature (with R_DS(on) temperature iteration), gate power and price.

Most engineering work with semiconductors is selecting parts from datasheets and making them work reliably. The datasheet is a contract: guaranteed limits under stated conditions, plus typical curves that illustrate behaviour.

A disciplined selection flow and a structured debug workflow save both money and weeks of lab time.

An analogy

A datasheet is like a nutrition label plus a warranty: typical curves show what an average sample tastes like, guaranteed limits are what you can legally rely on, and absolute maximum ratings are the 'do not exceed' warning.

Reading datasheets

Sections and traps:

Selection criteria

Voltage (with transients and derating), current (RMS, peak, pulsed), power and thermal path, frequency and switching speed (Q_g, Q_rr, C_oss), leakage (battery systems, high temperature), capacitance (RF, fast edges), operating temperature grade, package (assembly, parasitics, thermal), SOA (linear operation), cost, availability and lifecycle, reliability data, qualification (AEC-Q101 for automotive), and second-source compatibility.

Common device-level faults

Shorts (overstress, avalanche beyond E_AS, gate rupture), opens (bond-wire fusing), excessive leakage (ESD damage, contamination, high temperature), low gain/wrong threshold (wrong part, counterfeit, BTI), thermal runaway (positive feedback of leakage or V_BE), excessive switching loss (slow gate drive, Miller effect), oscillation (layout inductance, paralleled devices without gate resistors), unexpected capacitance (voltage-dependent C_oss), gate failure (overshoot above V_GS max). Counterfeit parts are a real risk — buy from authorised channels.

Engineering discipline

Design with worst-case (max) datasheet values over temperature, apply derating guidelines, verify with measurements (double-pulse tests, thermal imaging), and document assumptions. Keep a preferred-parts list with alternates; review lifecycle (NRND, EOL) and use parametric search tools carefully — check the fine print of each spec.

Formulas

Worked example: Voltage derating

Given: 48 V bus with 20% transients, 80% derating

Find: Minimum V_DS rating.

Answer: 72 V → choose 80 or 100 V

Worked example: Hot R_DS(on)

Given: R₂₅ 5 mΩ, α 0.5%/K, T_J 110 °C

Find: R_DS(on).

Answer: 7.1 mΩ

Worked example: Typical vs max

Given: V_th typ 2.5 V, min 1.5 V, max 3.5 V

Find: Design for 3.3 V gate drive?

Answer: No — some parts won't turn on; use a logic-level part

Selection flow and debug workflow

  SELECTION                               DEBUG
  Requirement (V, I, P, f, T, life)      Symptom → datasheet limits → visual inspection
   → electrical rating + derating         → power/bias check → I–V (curve tracer) vs good part
   → frequency / switching / leakage      → temperature (thermal camera) → waveforms (V_GS, V_DS, I_D)
   → thermal (θ, package, cooling)         → parameter extraction → compare with expected model
   → reliability & qualification (AEC-Q) → root cause → corrective action → verify
   → cost / availability / second source → final device

Selection narrows candidates by hard requirements first (voltage with derating, current, temperature), then optimises losses, size and cost, then checks supply-chain factors. Debugging mirrors it: confirm the device was used within limits before suspecting the device itself.

Comparing MOSFET candidates with thermal iteration

# Device selection: compare three MOSFETs for a 48 V, 20 A, 200 kHz half-bridge (loss + junction temperature)
cands = {               # R25 (mohm), Qg (nC), Esw at 48V/20A (uJ), theta_ja (C/W), price ($)
    "A (100 V, 4 mohm, big Qg)": (4.0, 90, 12.0, 20, 2.1),
    "B (100 V, 7 mohm, low Qg)": (7.0, 35, 5.0, 20, 1.6),
    "C (80 V, 10 mohm, tiny pkg)": (10.0, 20, 3.5, 45, 0.9),
}
I, D, f, Ta, Vdrv = 20.0, 0.5, 200e3, 60.0, 10.0
for name, (R, Qg, Esw, th, price) in cands.items():
    Tj = Ta
    for _ in range(30):                         # iterate: Rds(on) rises ~0.5%/K above 25 C
        Rhot = R * 1e-3 * (1 + 0.005 * (Tj - 25))
        P = I * I * Rhot * D + Esw * 1e-6 * f
        Tj = Ta + P * th
    print(f"{name:28s}: loss {P:5.2f} W, Tj {Tj:6.1f} C, gate power {Qg*1e-9*Vdrv*f*1e3:3.0f} mW, ${price:.2f} -> {'OK' if Tj < 125 else 'TOO HOT'}")
# A (100 V, 4 mohm, big Qg)   : loss  3.63 W, Tj  132.6 C, gate power 180 mW, $2.10 -> TOO HOT
# B (100 V, 7 mohm, low Qg)   : loss  3.08 W, Tj  121.5 C, gate power  70 mW, $1.60 -> OK
# C (80 V, 10 mohm, tiny pkg) : loss  5.55 W, Tj  309.5 C, gate power  40 mW, $0.90 -> TOO HOT

The lowest-R_DS(on) part (A) is not best: its larger switching energy at 200 kHz and the resulting self-heating push it to 133 °C. Part C is cheapest but its small package (θ_JA 45 °C/W) makes it thermally impossible. Part B balances conduction and switching and runs at 122 °C — acceptable but close to limits, suggesting better copper area or airflow. Iterating R_DS(on) with temperature matters: losses rise as the part heats.

Common mistakes

Applications

Key takeaways

Going further