Wide-Bandgap Power Devices: SiC & GaN

Silicon carbide and gallium nitride in practice. Learn why wide bandgap matters (critical field, thermal conductivity, intrinsic temperature), SiC material and polytypes (4H), SiC Schottky/MPS diodes, SiC MOSFETs (channel mobility, threshold drift, +15…+20 V/−3…−5 V gate drive, body-diode behaviour and bipolar degradation, short-circuit time, avalanche), GaN on Si lateral HEMTs (AlGaN/GaN polarisation-induced 2DEG, depletion-mode vs enhancement-mode p-GaN gate and cascode), low gate-voltage margins, zero Q_rr, dynamic R_DS(on) and current collapse, very high dv/dt, layout and package parasitics, reliability and cost — plus diamond and Ga₂O₃ outlook — with Python comparing Si IGBT and SiC MOSFET inverter losses vs frequency and GaN 2DEG sheet resistance.

SiC and GaN have roughly three times silicon's bandgap and ten times its critical field. That allows thinner, more heavily doped drift regions, far lower on-resistance per area, much smaller capacitances and higher operating temperatures — enabling faster, smaller and more efficient power converters.

They are not drop-in replacements: gate drive, layout, protection and reliability need different engineering, and cost remains higher.

An analogy

Moving from Si to SiC/GaN is like replacing a brick dam with a thin steel one: it holds the same water with a fraction of the thickness, but you must weld and inspect it very differently.

SiC devices

Engineering points:

GaN devices

Lateral HEMTs on large, cheap Si wafers: 40–650 V classes, extremely low Q_g and Q_oss and zero Q_rr (no minority carriers) — ideal for MHz converters, totem-pole PFC and USB-C chargers. E-mode p-GaN gates have narrow margins (V_th ~1.5 V, V_GS(max) ~7 V): precise drive and minimal ringing essential. Cascode GaN pairs a D-mode HEMT with a low-voltage Si MOSFET for a standard gate. Trapping in buffer/surface causes current collapse (dynamic R_DS(on)); field plates and buffer engineering mitigate it.

System-level consequences

Faster edges shrink switching loss but raise EMI, common-mode currents through heatsinks and motor windings, bearing currents and insulation stress; layout inductance of a few nH already causes large overshoot. Benefits must be weighed against device cost, gate-driver and protection complexity, and qualification maturity. Neither technology is universally superior: SiC dominates high-voltage/high-power (EV traction, solar, chargers), GaN dominates ≤ 650 V high-frequency, and Si IGBTs remain cost-effective in many drives.

Beyond SiC and GaN

Ultra-wide-bandgap materials — Ga₂O₃ (~4.8 eV, melt-grown wafers but poor thermal conductivity and no p-type), AlN and diamond (~5.5 eV, exceptional thermal conductivity but difficult doping and small wafers) — promise kV-class devices with even lower losses; they remain research/early-commercial technologies.

Formulas

Worked example: Switching loss

Given: SiC E_on + E_off 0.4 mJ, 60 kHz

Find: P_sw.

Answer: 24 W

Worked example: 2DEG resistance

Given: n_s 9 × 10¹² cm⁻², µ 2000

Find: R_sh.

Answer: ≈ 347 Ω/□

Worked example: Common-mode current

Given: Heatsink coupling 50 pF, dv/dt 80 V/ns

Find: Current pulse.

Answer: 4 A (!)

SiC MOSFET vs GaN HEMT

  SiC planar/trench MOSFET (vertical)          GaN HEMT on Si (lateral)
   S ─ n⁺ ─ p well ─gate (SiO₂)                  S ── gate (p-GaN) ── D   (field plates)
   n⁻ SiC drift (≈10 µm for 1200 V)              AlGaN barrier
   n⁺ SiC substrate ── D                          ════ 2DEG (polarisation, no doping) ════
   body diode: p-well/n-drift (V_F ≈ 3 V)         GaN buffer / transition layers / Si substrate
                                                  no body diode: reverse conduction via channel (~2–3 V)

SiC MOSFETs look like silicon vertical MOSFETs with a much thinner drift layer; the SiO₂/SiC interface lowers channel mobility and causes threshold instability. GaN HEMTs are lateral: spontaneous and piezoelectric polarisation at the AlGaN/GaN interface creates a dense, high-mobility electron sheet without doping; they are naturally normally-on unless a p-GaN gate or cascode makes them normally-off.

SiC vs Si inverter losses and GaN 2DEG

import math
# SiC MOSFET vs Si IGBT in a 800 V, 20 A inverter leg; GaN 2DEG sheet density
V, I = 800, 20
si = {"Eon": 1.6e-3, "Eoff": 1.2e-3, "cond": 20 * (0.9 + 0.035 * 20) * 0.5}     # 1200 V IGBT + diode
sic = {"Eon": 0.35e-3, "Eoff": 0.15e-3, "cond": 20**2 * 0.040 * 0.5}          # 1200 V SiC MOSFET, 40 mohm hot
for f in (10e3, 20e3, 50e3):
    p_si = si["cond"] + (si["Eon"] + si["Eoff"]) * f
    p_sic = sic["cond"] + (sic["Eon"] + sic["Eoff"]) * f
    print(f"{f/1e3:3.0f} kHz: Si IGBT {p_si:6.1f} W, SiC MOSFET {p_sic:6.1f} W per switch")
q = 1.602e-19
sigma_pol = 1.1e13                  # polarisation sheet charge for Al0.25Ga0.75N/GaN (cm^-2, typical)
mu = 1800
Rsh = 1 / (q * sigma_pol * mu)
print(f"2DEG: ns ~ {sigma_pol:.1e} cm^-2, mobility {mu} -> sheet resistance {Rsh:.0f} ohm/sq without any doping")
Ron0, collapse = 50e-3, 1.3
print(f"dynamic Rds(on): 50 mohm static -> {Ron0*collapse*1e3:.0f} mohm after high-voltage switching (x{collapse}) -> conduction loss +{(collapse-1)*100:.0f}%")
#  10 kHz: Si IGBT   44.0 W, SiC MOSFET   13.0 W per switch
#  20 kHz: Si IGBT   72.0 W, SiC MOSFET   18.0 W per switch
#  50 kHz: Si IGBT  156.0 W, SiC MOSFET   33.0 W per switch
# 2DEG: ns ~ 1.1e+13 cm^-2, mobility 1800 -> sheet resistance 315 ohm/sq without any doping
# dynamic Rds(on): 50 mohm static -> 65 mohm after high-voltage switching (x1.3) -> conduction loss +30%

For an 800 V, 20 A inverter leg, the SiC MOSFET's ~5× lower switching energy dominates: 13 W vs 44 W at 10 kHz and 33 W vs 156 W at 50 kHz — allowing higher frequency (smaller magnetics) or cooler operation. GaN's 2DEG reaches ~300 Ω/□ with no doping at all; its dynamic R_DS(on) after high-voltage switching (here ×1.3) must be included in loss calculations.

Common mistakes

Applications

Key takeaways

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