3.1 NOT Gate: Logical Inversion
Explain what a NOT gate does, write and read its Boolean expression and truth table, and distinguish logical inversion from arithmetic negation.
The NOT gate, also called an inverter, is the simplest possible logic element: it has exactly one input and one output, and its entire job is to flip a binary value to its opposite. Every digital system, no matter how large, is ultimately built out of a small handful of primitive gates, and NOT is one of the three foundational ones (alongside AND and OR) that every other gate and every combinational circuit can be expressed in terms of. It is needed because digital design constantly requires the complement of a signal — an active-low enable line, the opposite branch of a decision, or a bit that must read as the logical opposite of another bit — and the inverter is the single dedicated circuit element that produces exactly that, with no other side effects on the signal's timing behavior beyond a small propagation delay.
Core Concept: One Input, One Output, Total Inversion
A NOT gate takes a single binary input A and produces a single output Y that is always the opposite of A: if A is 0, Y is 1; if A is 1, Y is 0. There is no combination of the input that produces anything else, which makes the NOT gate's behavior completely described by just two rows of a truth table — the smallest truth table of any gate in this course. Because it operates on a single variable, the NOT gate is also called a unary operator, in contrast to AND, OR, XOR and the rest, which are binary operators that combine two (or more) inputs.
Structurally, a NOT gate is drawn as a triangle pointing toward the output with a small circle (called a 'bubble') at the tip. That bubble is not decorative — in schematic notation, a bubble anywhere on a gate symbol always means 'this signal is inverted here', and you will see the same bubble reused on the output of NAND and NOR gates later in this module, because a NAND gate is literally an AND gate with a NOT bubble tacked onto its output, and a NOR gate is an OR gate with the same treatment.
• NOT has exactly one input (A) and one output (Y) — the only unary gate in this course. • Y = A' (read 'A prime' or 'A bar') — also written Y = ~A. • Schematic symbol: a triangle with a bubble at the output tip; the bubble always denotes inversion. • The two-row truth table (0→1, 1→0) fully and exclusively describes its behavior.
Step-by-Step: Reading and Applying the Truth Table
Working with a NOT gate is a single lookup: take the value of A, find that row in the truth table, and read off Y. There is no arithmetic to perform and no combination of multiple inputs to consider, which is exactly why it is introduced first in this course — it lets you practice the mechanics of 'given an input row, produce an output value' before AND and OR add the complexity of a second input and a 2⁴-row-scaling truth table.
In a larger circuit, a NOT gate is frequently chained directly after another gate's output (for instance, an AND gate followed by an inverter to build a NAND gate, which is exactly how Module 3.4 constructs NAND), or placed on one branch of a circuit to create a control signal that must be the logical opposite of another signal driving a different part of the same circuit — for example, driving a device on one branch while simultaneously driving its complement to disable a competing branch.
• Step 1: Identify the single input value of A (0 or 1). • Step 2: Apply Y = A' — flip the bit. • Step 3: If A = 1, then Y = 0. This is the spec's own worked example.
Practical and Real-World Application
Inverters are everywhere in real digital systems, not just as standalone components but as the building block hidden inside dozens of other gates and circuits. Active-low reset and chip-select lines on real ICs (where the pin is meant to be driven low, not high, to trigger an action) are typically generated or consumed through an inverter somewhere in the signal path. Inverters are also used as simple signal buffers/restorers in long signal traces, where a chain of two inverters back-to-back can clean up (restore full logic levels to) a degraded signal without changing its logical value.
At the transistor level, the CMOS inverter is the most fundamental logic circuit taught in electronics: a single PMOS transistor pulling the output high and a single NMOS transistor pulling the output low, driven by the same input, so that exactly one of the two is ever conducting at a time. Every more complex CMOS gate (AND, OR, NAND, NOR) is, at the transistor level, a generalization of this same pull-up/pull-down structure.
Common Mistake and the Tricky Concept
The single most common conceptual slip with the NOT gate is confusing logical inversion with arithmetic negation. Logical inversion (what the NOT gate does) simply flips a bit between its two allowed values, 0 and 1 — there is no concept of a 'negative bit'. Arithmetic negation, by contrast, is what you use when computing the negative of a signed number, and it involves a completely different procedure covered later in Module 2 of this course: taking the two's complement (invert every bit, then add 1), not just inverting each bit on its own.
This distinction matters in practice: if you take an 8-bit signed number and simply run every bit through a NOT gate (invert each bit with no further step), you get that number's one's complement, not its arithmetic negative — the two's complement operation is 'invert, then add 1', and skipping the '+1' step is a real, common bug in hand-worked signed-arithmetic problems.
NOT Gate Notation and Truth Table
A' and ~A are two equally valid ways to write the same complement operation used throughout this course. The bubble on the output is the universal schematic symbol for inversion — you will reuse it on NAND and NOR.
Boolean expression:
Y = A' (read "A prime" / "A complement")
Y = ~A (equivalent notation)
Truth Table:
A | Y
---+---
0 | 1
1 | 0
Symbol:
A ──▷o── Y
(triangle = buffer/amplify, bubble = invert)Code Examples
This is the course's own baseline example: with a single input A = 1, the NOT gate's rule Y = A' flips it directly to Y = 0. There is nothing to compute beyond the single-row lookup — this is the entire behavior of the gate. Expected result: Y = 0 Y = A' = 1' = 0
Feeding a signal through two NOT gates in series always returns the original value, because (A')' = A. This 'double inversion cancels' identity is used in real circuits as a buffer that restores signal levels without altering logic value.
Given: A = 1
Apply: Y = A'
Y = 1' = 0A = 0
Stage 1: B = A' = 0' = 1
Stage 2: Y = B' = 1' = 0
Result: Y = ANOT Gate Symbol and Truth Table
Triangle body = signal path, bubble at the tip = inversion.
A ──▷o── Y
A | Y
---+---
0 | 1
1 | 0Important Rules
Y = A' for every possible value of A — the complete definition of the gate.
(A')' = A — double inversion returns the original value (used repeatedly in Boolean simplification).
NOT is unary: it is the only gate in this course with a single input.
A bubble on any gate's output symbol always means that gate's raw output is inverted.
Active-Low Control Lines and CMOS Fundamentals
Real ICs frequently expose active-low pins (reset, chip-select, output-enable) that must be driven low to take effect; inverters are the standard component for translating an active-high control signal into the active-low form a chip expects, and vice versa. At the transistor level, the CMOS inverter (one PMOS, one NMOS) is the base cell every other CMOS logic gate generalizes from, making the NOT gate not just a logical primitive but a literal circuit template.
Circuit Symbol
The NOT gate's IEEE symbol: a triangular buffer body with a small bubble at its output tip — that bubble is the only difference between a NOT gate and a plain (non-inverting) buffer.
How It's Formed: CMOS Transistor Level
How a NOT gate is physically formed: the CMOS inverter is the simplest possible static CMOS gate — one PMOS transistor pulls the output high when A=0, one NMOS transistor pulls it low when A=1, and the two are never on at the same time, so the gate draws almost no static current between switches.
Treating NOT as arithmetic negation of a signed number (just flip every bit and call it '-A').
Use NOT (bit inversion) only for logical complementation; for the arithmetic negative of a signed binary number, invert every bit AND then add 1 (two's complement).
The spec explicitly warns that a NOT gate 'does not perform arithmetic negation in the same sense as signed binary subtraction; it performs logical inversion.' Inverting every bit alone produces the one's complement, which is off by one from the true arithmetic negative.
[tricky-problem] A NOT gate has one input and one output. Which statement correctly describes what it computes? A. It computes the arithmetic negative of A, equivalent to signed subtraction. B. It performs logical inversion of A, flipping 0 to 1 and 1 to 0, with no arithmetic meaning. C. It adds 1 to A modulo 2. D. It is only meaningful when A represents a signed number.
B. It performs logical inversion of A, flipping 0 to 1 and 1 to 0, with no arithmetic meaning. — As the spec notes, a NOT gate performs logical inversion, not arithmetic negation in the signed-subtraction sense. Computing an arithmetic negative requires the full two's-complement procedure (invert then add 1), which is a distinct, multi-step operation from a single NOT gate's bit-flip.
[interview] Why is the NOT gate schematic symbol a triangle with a bubble, rather than just a bubble alone? A. The triangle has no meaning; only the bubble matters. B. The triangle represents the buffering/signal-path element, and the bubble is a separable inversion marker also reused on NAND/NOR outputs. C. The triangle indicates the gate requires external power, unlike other gates. D. The triangle denotes a tri-state output.
B. The triangle represents the buffering/signal-path element, and the bubble is a separable inversion marker also reused on NAND/NOR outputs. — The triangle is the generic 'buffer' body used across gate symbols, and the bubble is a standalone marker for inversion that appears wherever a signal is complemented — including on the outputs of NAND and NOR, which are literally AND/OR gates with that same bubble added.
What is the result of passing a signal through two NOT gates in series? A. The signal is inverted twice, permanently corrupting it. B. The output equals the original input, since (A')' = A. C. The output is always 0 regardless of input. D. The output floats and is undefined.
B. The output equals the original input, since (A')' = A. — Double inversion cancels: (A')' = A. This identity is a basic Boolean law used both in real buffer circuits (to restore signal levels) and constantly during Boolean simplification in Module 4.
A digital thermostat outputs a signal HEAT_ON that is 1 while heating is active. Design the Boolean expression for a status LED, COOL_INDICATOR, that must light only while heating is NOT active, using a single NOT gate.
COOL_INDICATOR = HEAT_ON' — a single inverter fed by HEAT_ON produces exactly the complement needed.
You only have one input signal (HEAT_ON) and need its logical opposite.